Circuits in which a piezoelectric oscillator such as a crystal oscillator and a feedback resistance element are connected in parallel across the input and output of a CMOS inverter are in widespread use as oscillation circuits used as a source for generating a reference clock. Patent Document 1 discloses a technique for suppressing needless consumption of current in such an oscillation circuit when oscillation stops. In the oscillation circuit of Patent Document 1, a feedback resistor is constituted by a MOS transistor, a series circuit in which a second feedback resistor having a resistance value lower than that of the MOS transistor and a capacitance element are serially connected is connected in parallel with the MOS transistor, and a control circuit is provided for holding the input or output terminal of a CMOS inverter at a desired potential by a signal for halting oscillation. The oscillation circuit operates in such a manner that the MOS transistor is turned off by the oscillation-halt signal.
On the other hand, Patent Document 2 describes an oscillation circuit the object of which is to hasten oscillation start-up. The oscillation circuit is provided with a trigger circuit for generating a trigger upon detecting the rising edge of power supply voltage on the input or output side of an amplifier. Oscillation is started by supplying a trigger pulse to the oscillation circuit by the trigger circuit.
As related art, Patent Document 3 describes an oscillation circuit the object of which is to facilitate normal oscillation. The oscillation circuit comprises a vibrator connected in parallel with a feedback resistor externally of the oscillation circuit; and an oscillation starting circuit forming an oscillator connected to one terminal of the vibrator and packaged together with the vibrator, and being rendered conductive by an external signal to thereby ground the terminal and start oscillation of an amplifier equipped with a feedback resistor.    [Patent Document 1]
JP Patent Kokai Publication No. JP-A7-193427    [Patent Document 2]
JP Patent Kokai Publication No. JP-A59-205802    [Patent Document 3]
JP Patent Kokai Publication No. JP-A11-308051